Datasheet

DS2406
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13. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 2µs of this falling edge and will remain valid for 15µs total from falling
edge on 1-Wire bus.
14. An additional reset or communication sequence cannot begin until the reset high time has expired.
15. The Reset Low Time (t
RSTL
) should be restricted to a maximum of 960μs to allow interrupt signaling;
otherwise, it could mask or conceal interrupt pulses.
16. The accumulative duration of the programming pulses for each address must not exceed 5ms.