Datasheet

DS2401
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 5
480µs ≤ t
RSTL
< ∞ *
480µs ≤ t
RSTH
< ∞ (includes recovery time)
15µs ≤ t
PDH
< 60µs
60µs ≤ t
PDL
< 240µs
∗ In order not to mask interrupt signaling by other devices on the 1-Wire bus, t
RSTL
+ t
R
should always
be less than 960µs.
READ/WRITE TIMING DIAGRAM Figure 6
Write-One Time Slot
60µs ≤ t
SLOT
< 120µs
1µs ≤ t
LOW1
< 15µs
1µs ≤ t
REC
< ∞
RESISTOR
MASTER
RESISTOR
MASTER
DS2401