Datasheet

DS21Q59 Quad E1 Transceiver

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24. FUNCTIONAL TIMING DIAGRAMS

24.1 Receive

Figure 24-1. Receive Frame and Multiframe Timing

Figure 24-2. Receive Boundary Timing (With Elastic Store Disabled)

Figure 24-3. Receive Boundary Timing (With Elastic Store Enabled)

FRAME#

23456789101112131415161

RSYNC

NOTE 1: RSYNC IN FRAME/OUTPUT MODE (RCR.6 = 0).

NOTE 2: RSYNC IN MULTIFRAME/OUTPUT MODE (RCR.6 = 1). THIS DIAGRAM ASSUMES THE CAS MF BEGINS IN THE RAF FRAME.

CHANNEL 32

CHANNEL 1 CHANNEL 2

RCLK

RSER

RSYNC

LSB

MSB

Si 1 A Sa4 Sa5 Sa6 Sa7 Sa8

RSER

CHANNEL 1

SYSCLK

RSYNC

CHANNEL 31 CHANNEL 32

RSYNC

LSB MSB

LSB

MSB

NOTE 1: RSYNC IS IN THE OUTPUT MODE (RCR.5 = 0).

NOTE 2: RSYNC IS IN THE INPUT MODE (RCR.5 = 1). RSYNC MAY BE HELD HIGH FOR MULTIPLE CLOCK CYCLES AS LONG

S IT TRANSITIONS LOW ONE CLOCK CYCLE BEFORE TRANSITIONING HIGH AGAIN FOR THE NEXT SYNC PULSE.