Datasheet

DS21Q59 Quad E1 Transceiver
50 of 76
Figure 21-3. Transmit Waveform Template
21.3 Jitter Attenuators
The DS21Q59 contains an on-board clock and data jitter attenuator for each transceiver and a single, undedicated
“clock only” jitter attenuator. This undedicated jitter attenuator is shown in the block diagram (Figure 3-1
) as the
alternate jitter attenuator.
21.3.1 Clock and Data Jitter Attenuators
The clock and data jitter attenuators can be mapped into the receive or transmit paths and can be set to buffer
depths of either 32 or 128 bits through the LICR. The 128-bit mode is used in applications where large excursions
of wander are expected. The 32-bit mode is used in delay-sensitive applications. The characteristics of the
attenuators are shown in Figure 21-5
. The jitter attenuators can be placed in either the receive path or the transmit
path by appropriately setting or clearing the JAS bit in the LICR. Also, setting the DJA bit in the LICR can disable
the jitter attenuator (in effect, remove it). For the jitter attenuator to operate properly, a 2.048MHz clock (±50ppm)
must be applied at the MCLK pin. On-board circuitry adjusts either the recovered clock from the clock/data
recovery block or the clock applied at the TCLKI pin to create a smooth jitter-free clock that is used to clock data
out of the jitter attenuator FIFO. It is acceptable to provide a gapped/bursty clock at the TCLKI pin if the jitter
attenuator is placed on the transmit side. If the incoming jitter exceeds either 120UI
P-P
(buffer depth is 128 bits) or
28UI
P-P
(buffer depth is 32 bits), the DS21Q59 divides the internal nominal 32.768MHz clock by either 15 or 17
instead of the normal 16 to keep the buffer from overflowing. When the device divides by either 15 or 17, it also
sets the jitter attenuator limit trip (JALT) bit in the receive information register (RIR.5).
0
-0.1
-0.2
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0
TIME (ns)
SCALED AMPLITUDE
50 100 150 200 250 -50-100-150 -200 -250
269ns
194ns
219ns
(in 75W systems, 1.0 on the scale = 2.37Vpeak
in 120W systems, 1.0 on the scale = 3.00Vpeak)
G.703
TEMPLATE