Datasheet

DS21Q50
79 of 87
Figure 21-4. Intel Bus Read Timing (PBTS = 0)
Figure 21-5. Intel Bus Write Timing (PBTS = 0)
Address Valid
Data Valid
A0–A7
D0–D7
W
R
C
S
R
D
0ns (min)
0ns (min)
75ns (max)
0ns (min)
5ns (min)/20ns (max)
t1
t2 t3 t4
t5
Address Valid A0–A7
D0–D7
R
D
C
S
W
R
0ns min.
0ns (min)
75ns (min)
0ns (min)
10ns (min) 10ns (min)
t1
t2 t6 t4
t7 t8