Datasheet

DS21Q50
64 of 87
17. CMI (CODE MARK INVERSION)
The DS21Q50 provides a CMI interface for connection to optical transports. This interface is a unipolar
1T2B-coded signal. Ones are alternately encoded as a logical 1 or 0 level for the full duration of the clock
period. Zeros are encoded as a 0-to-1 transition at the middle of the clock period. Figure 17-1 shows an
example data pattern and its CMI result. The control bit for enabling CMI is in the OUTAC register as
shown below.
Register Name: OUTAC (Reproduced here for clarity)
Register Description:
OUTA Control Register
Register Address:
1A Hex
Bit 7 6 5 4 3 2 1 0
Name TTLIE CMII CMIE OA4 OA3 OA2 OA1 OA0
NAME BIT FUNCTION
TTLIE 7
TTL Input Enable. When this bit is set, the receiver can accept TTL positive and negative
data at the RTIP and RRING inputs. The data is clocked in on the falling edge of MCLK.
CMII 6
CMI Invert
0 = CMI input data not inverted
1 = CMI input data inverted
CMIE 5
Transmit and Receive CMI Enable
0 = Transmit and receive line interface operates in normal AMI/HDB3 mode
1 = Transmit and receive line interface operate in CMI mode. TTIP is CMI output and
RTIP is CMI input. In this mode of operation TRING and RRING are no-connects.
OA4 4 OUTA Control Bit 4. Inverts OUTA output.
OA3 3 OUTA Control Bit 3. See Table 15-1 for details.
OA2 2 OUTA Control Bit 2. See Table 15-1for details.
OA1 1 OUTA Control Bit 1. See Table 15-1for details.
OA0 0 OUTA Control Bit 0. See Table 15-1 for details.
Figure 17-1. CMI Coding
01 11001
CLOCK
DATA
CMI