Datasheet

DS21Q50
59 of 87
16.4 Transmit Waveshaping and Line Driving
The DS21Q50 uses a set of laser-trimmed delay lines with a precision digital-to-analog converter (DAC)
to create the waveforms that are transmitted onto the E1 line. The waveforms meet the ITU G.703
specifications (Figure 16-4). The user selects which waveform is to be generated by properly
programming the L2/L1/L0 bits in the LICR. The DS21Q50 can be set up in a number of various
configurations, depending on the application (Table 16-3).
Table 16-3. Line Build-Out Select in LICR
L2 L1 L0 APPLICATION TRANSFORMER RETURN LOSS
*
RT
**
(Ω)
0 0 0
75W normal
1:2 step-up NM 0
0 0 1
120W normal
1:2 step-up NM 0
0 1 0
75W with protection resistors
1:2 step-up NM 2.5
0 1 1
120W with protection
resistors
1:2 step-up NM 2.5
1 0 0
75W with high return loss
1:2 step-up 21dB 6.2
*NM = Not Meaningful (return loss value too low for significance).
**Refer to Application Note 336: Transparent Operation on T1, E1 Framers and Transceivers for details on E1 line interface design.
Because of DS21Q50 transmitter’s design, very little jitter (less than 0.005 UI
P-P
broadband from 10Hz to
100kHz) is added to the jitter present on TCLK (or source used for transmit clock). The waveform created
is independent of the duty cycle of TCLK. The transmitter in the device couples to the E1 transmit-
shielded twisted pair or coax through a 1:2 step-up transformer, as shown in Figure 16-2. For the devices
to create the proper waveforms, the transformer must meet the specifications listed in Table 16-4. The
line driver in the device contains a current limiter that prevents more than 50mA (RMS) from being
sourced in a 1Ω load.
Table 16-4. Transformer Specifications
SPECIFICATION RECOMMENDED VALUE
Turns Ratio 1:1 (receive) and 1:2 (transmit) ±3%
Primary Inductance
600mH minimum
Leakage Inductance
1.0mH maximum
Intertwining Capacitance 40pF maximum
DC Resistance
1.2W maximum