Datasheet

DS21Q50
49 of 87
12. PER-CHANNEL LOOPBACK
The DS21Q50 has per-channel loopback capability that can operate in one of two modes: remote per-
channel loopback or local per-channel loopback. PCLB1/2/3/4 are used for both modes to determine
which channels are looped back. In remote per-channel loopback mode, PCLB1/2/3/4 determine which
channels (if any) in the transmit direction should be replaced with the data from the receiver or, rather, off
the E1 line. In local per-channel loopback mode, PCLB1/2/3/4 determines which channels (if any) in the
receive direction should be replaced with the data from the transmit direction. If either mode is enabled,
then transmit and receive clocks and frame syncs must be synchronized. There are no restrictions on
which channels can be looped back or on how many channels can be looped back.
Register Name:
PCLB1, PCLB2, PCLB3, PCLB4
Register Description:
Per-Channel Loopback Registers
Register Address:
2B Hex, 2C Hex, 2D Hex, 2E Hex
Bit # 7 6 5 4 3 2 1 0
Name CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
Name CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9
Name CH24 CH23 CH22 CH21 CH20 CH19 CH18 CH17
Name CH32 CH31 CH30 CH29 CH28 CH27 CH26 CH25
NAME BIT FUNCTION
CH1 to CH32 PCLB1.0 to 4.7
Per-Channel Loopback Control Bits
0 = do not loopback this channel
1 = loopback this channel
13. ELASTIC STORE OPERATION
The DS21Q50 contains a two-frame (512 bits) elastic store for the receive direction. The elastic store is
used to absorb the differences in frequency and phase between the E1 data stream and an asynchronous
(i.e., not frequency locked) backplane clock that can be 2.048MHz for normal operation or 4.096MHz,
8.192MHz, or 16.384MHz when using the IBO. The elastic store contains full-controlled slip capability.
If the receive elastic store is enabled (RCR.4 = 1), the user must provide a 2.048MHz clock to the
SYSCLK pin. If the IBO function is enabled, a 4.096MHz, 8.192MHz, or 16.384MHz clock must be
provided at the SYSCLK pin. The user can either provide a frame/multiframe sync at the RSYNC pin
(RCR.5 = 1) or have the RSYNC pin provide a pulse on frame/multiframe boundaries (RCR.5 = 0). If the
user wishes to obtain pulses at the frame boundary, RCR1.6 must be set to 0. If the user wishes to have
pulses occur at the multiframe boundary, RCR1.6 must be set to 1. If the elastic store is enabled, either
CAS (RCR.7 = 0) or CRC4 (RCR.7 = 1) multiframe boundaries are indicated through the RSYNC output.
See Section 19.1
for timing details. If the 512-bit elastic buffer either fills or empties, a controlled slip
occurs. If the buffer empties, a full frame of data (256 bits) is repeated at RSER, and the SR1.4 and RIR.3
bits are set to 1. If the buffer fills, a full frame of data is deleted, and the SR1.4 and RIR.4 bits are set to 1.