Datasheet

DS21Q50
47 of 87
Table 9-1. Master Port Selection
SCS2 SCS1 SCS0 PORT SELECTED AS MASTER
0 0 0
None (Master Port can be derived from
another DS21Q50 in the system.)
0 0 1 Transceiver 1
0 1 0 Transceiver 2
0 1 1 Transceiver 3
1 0 0 Transceiver 4
1 0 1 Reserved for future use
1 1 0 Reserved for future use
1 1 1 Reserved for future use
Table 9-2. Synthesizer Output Select
CSS1 CSS0
SYNTHESIZER OUTPUT
FREQUENCY (MHz)
0 0 2.048
0 1 4.096
1 0 8.192
1 1 16.384
10. TRANSMIT CLOCK SOURCE
Depending on the operating mode, the transmit clock can be derived from different sources. In a basic
configuration, where the IBO function is disabled, the transmit clock is normally sourced from the TCLK
pin. In this mode, a 2.048MHz clock with ±50ppm accuracy is applied to the TCLK pin. If the signal at
TCLK is lost, the DS21Q50 automatically switches to either the system reference clock present on the
REFCLK pin or to the recovered clock off the same port, depending on which source the host assigned as
the backup clock. At the same time the host can be notified of the loss-of-transmit clock through an
interrupt. The host can at any time force a switchover to one of the two backup clock sources, regardless
of the state of the TCLK pin.
When the IBO function is enabled, the transmit clock must be synchronous to the system clock, since
slips are not allowed in the transmit direction. In this mode, the TCLK pin is ignored and a transmit clock
is automatically provided by the IBO circuit by dividing the clock present on the SYSCLK pin by 2, 4, or
8. In this configuration, if the signal present on the SYSCLK pin is lost, the DS21Q50 automatically
switches to either the system reference clock or to the recovered clock off the same port, depending on
which source the host assigned as the backup clock. The host can at any time force a switchover to one of
the two backup clock sources, regardless of the state of the SYSCLK pin.