Datasheet

DS21Q50
37 of 87
Register Name:
SR2
Register Description:
Status Register 2
Register Address:
0B Hex
Bit 7 6 5 4 3 2 1 0
Name RMF RAF TMF SEC TAF LOTC RCMF PRBSD
NAME BIT FUNCTION
RMF 7
Receive CAS Multiframe. Set every 2ms (regardless if CAS signaling is enabled or not)
on receive multiframe boundaries.
RAF 6
Receive Align Frame. Set every 250µs at the beginning of align frames. Used to alert the
host that Si and Sa bits are available in the RAF and RNAF registers.
TMF 5
Transmit Multiframe. Set every 2ms (regardless if CRC4 is enabled) on transmit
multiframe boundaries.
SEC 4
One-Second Timer. Set on increments of one second based on RCLK. If CCR2.7 = 1, this
bit is set every 62.5ms instead of once a second.
TAF 3
Transmit Align Frame. Set every 250µs at the beginning of align frames. Used to alert the
host that the TAF and TNAF registers need to be updated.
LOTC 2
Loss-of-Transmit Clock. Set when the TCLK pin has not transitioned for one channel time
(or 3.9ms).
RCMF 1
Receive CRC4 Multiframe. Set on CRC4 multiframe boundaries; continues to be set every
2ms on an arbitrary boundary if CRC4 is disabled.
PRBSD 0
Pseudorandom Bit-Sequence Detect. When receive PRBS is enabled, this bit is set when
the 2
15
- 1 PRBS pattern is detected at RPOS and RNEG. The PRBS pattern can be
framed, unframed, or in a specific time slot.