Datasheet

DS2155
209 of 238
Figure 35-3. Receive-Side Boundary Timing (Elastic Store Disabled)
Note 1:
RCHBLK is programmed to block channel 24.
Note 2: Shown is RLINK/RLCLK in the ESF framing mode.
Figure 35-4. Receive-Side 1.544MHz Boundary Timing (Elastic Store
Enabled)
Note 1: RSYNC is in the output mode (IOCR1.4 = 0).
Note 2: RSYNC is in the input mode (IOCR1.4 = 1).
Note 3: RCHBLK is programmed to block channel 24.
CHANNEL 23
CHANNEL 24 CHANNEL 1
CHANNEL 23
CHANNEL 24 CHANNEL 1
RCLK
RSER
RSYNC
RFSYNC
RSIG
RCHCLK
RCHBLK
1
RLCLK
RLINK
2
BA
C/A
D/B
AC/A
D/B
LSB
F
MSB
MSB
LSB
AB
RSER
CHANNEL 23
CHANNEL 24 CHANNEL 1
RCHCLK
RCHBLK
RSYSCLK
RSYNC
2
3
RSYNC
1
RMSYNC
RSIG
LSB
F
MSB
MSB
LSB
CHANNEL 23 CHANNEL 24
CHANNEL 1
BA
C/A
D/B
AC/A
D/B
AB