Datasheet

DS21352/DS21552
75 of 137
RHFR: RECEIVE HDLC FIFO (Address=05 Hex)
(MSB) (LSB)
RHFR7 RHFR6 RHFR5 RHFR4 RHFR3 RHFR2 RHFR1 RHFR0
SYMBOL POSITION NAME AND DESCRIPTION
RHFR7 RHFR.7 HDLC Data Bit 7. MSB of a HDLC packet data byte.
RHFR6 RHFR.6
HDLC Data Bit 6.
RHFR5 RHFR.5
HDLC Data Bit 5.
RHFR4 RHFR.4
HDLC Data Bit 4.
RHFR3 RHFR.3
HDLC Data Bit 3.
RHFR2 RHFR.2
HDLC Data Bit 2.
RHFR1 RHFR.1
HDLC Data Bit 1.
RHFR0 RHFR.0 HDLC Data Bit 0. LSB of a HDLC packet data byte.
THIR: TRANSMIT HDLC INFORMATION (Address=06 Hex)
(MSB) (LSB)
–––––TEMPTYTFULLTUDR
SYMBOL POSITION NAME AND DESCRIPTION
–THIR.7Not Assigned. Could be any value when read.
–THIR.6Not Assigned. Could be any value when read.
–THIR.5Not Assigned. Could be any value when read.
–THIR.4Not Assigned. Could be any value when read.
–THIR.3Not Assigned. Could be any value when read.
TEMPTY THIR.2 Transmit FIFO Empty. A real–time bit that is set high when the FIFO is empty.
TFULL THIR.1 Transmit FIFO Full. A real–time bit that is set high when the FIFO is full.
TUDR THIR.0 Transmit FIFO Under-run. Set when the transmit FIFO empties out without the
TEOM control bit being set. An abort is automatically sent.
NOTE:
The TUDR bit is latched and will be cleared when read.
TBOC: TRANSMIT BOC REGISTER (Address=07 Hex)
(MSB) (LSB)
SBOC HBEN BOC5 BOC4 BOC3 BOC2 BOC1 BOC0
SYMBOL POSITION NAME AND DESCRIPTION
SBOC TBOC.7 Send BOC. Rising edge triggered. Must be transitioned from a 0 to a 1 transmit the
BOC code placed in the BOC0 to BOC5 bits instead of data from the HDLC controller.
HBEN TBOC.6
Transmit HDLC & BOC Controller Enable.