Datasheet

DS21352/DS21552
44 of 137
RIR1: RECEIVE INFORMATION REGISTER 1 (Address=22 Hex)
(MSB) (LSB)
COFA 8ZD 16ZD RESF RESE SEFE B8ZS FBE
SYMBOL POSITION NAME AND DESCRIPTION
COFA RIR1.7 Change of Frame Alignment. Set when the last resync resulted in a change of frame
or multiframe alignment.
8ZD RIR1.6 Eight Zero Detect. Set when a string of at least eight consecutive zeros (regardless of
the length of the string) have been received at RPOSI and RNEGI.
16ZD RIR1.5 Sixteen Zero Detect. Set when a string of at least sixteen consecutive zeros (regardless
of the length of the string) have been received at RPOSI and RNEGI.
RESF RIR1.4 Receive Elastic Store Full. Set when the receive elastic store buffer fills and a frame
is deleted.
RESE RIR1.3 Receive Elastic Store Empty. Set when the receive elastic store buffer empties and a
frame is repeated.
SEFE RIR1.2 Severely Errored Framing Event. Set when 2 out of 6 framing bits (Ft or FPS) are
received in error.
B8ZS RIR1.1 B8ZS Code Word Detect. Set when a B8ZS code word is detected at RPOSI and
RNEGI independent of whether the B8ZS mode is selected or not via CCR2.6. Useful
for automatically setting the line coding.
FBE RIR1.0 Frame Bit Error. Set when a Ft (D4) or FPS (ESF) framing bit is received in error.
RIR2: RECEIVE INFORMATION REGISTER 2 (Address=31 Hex)
(MSB) (LSB)
RLOSC LRCLC TESF TESE TSLIP RBLC RPDV TPDV
SYMBOL POSITION NAME AND DESCRIPTION
RLOSC RIR2.7 Receive Loss of Sync Clear. Set when the framer achieves synchronization; will
remain set until read.
LRCLC RIR2.6 Line Interface Receive Carrier Loss Clear. Set when the carrier signal is restored;
will remain set until read. See Table 7-2.
TESF RIR2.5 Transmit Elastic Store Full. Set when the transmit elastic store buffer fills and a frame
is deleted.
TESE RIR2.4 Transmit Elastic Store Empty. Set when the transmit elastic store buffer empties and a
frame is repeated.
TSLIP RIR2.3 Transmit Elastic Store Slip Occurrence. Set when the transmit elastic store has either
repeated or deleted a frame.
RBLC RIR2.2 Receive Blue Alarm Clear. Set when the Blue Alarm (AIS) is no longer detected; will
remain set until read. See Table 7-2.
RPDV RIR2.1 Receive Pulse Density Violation. Set when the receive data stream does not meet the
ANSI T1.403 requirements for pulse density.
TPDV RIR2.0 Transmit Pulse Density Violation. Set when the transmit data stream does not meet
the ANSI T1.403 requirements for pulse density.
RIR3: RECEIVE INFORMATION REGISTER 3 (Address=10 Hex)
(MSB) (LSB)
RL1 RL0 JALT LORC FRCL – – –
SYMBOL POSITION NAME AND DESCRIPTION
RL1 RIR3.7 Receive Level Bit 1. SeeTable 7-1.
RL0 RIR3.6 Receive Level Bit 0. See Table 7-1.
JALT RIR3.5 Jitter Attenuator Limit Trip. Set when the jitter attenuator FIFO reaches to within 4