Datasheet

DS21352/DS21552
116 of 137
Figure 21-9 TRANSMIT SIDE ESF TIMING
Notes:
1. TSYNC in frame mode (TCR2.3 = 0) and double-wide frame sync is not enabled (TCR2.4 = 0)
2. TSYNC in frame mode (TCR2.3 = 0) and double-wide frame sync is enabled (TCR2.4 = 1)
3. TSYNC in multiframe mode (TCR2.3 = 1)
4. TLINK data (FDL bits) sampled during the F-bit time of odd frame and inserted into the outgoing T1 stream if enabled via
TCR1.2
5. ZBTSI mode is enabled (TCR2.5 = 1)
6. TLINK data (Z bits) sampled during the F-bit time of frames 1, 5, 9, 13, 17, and 21 and inserted into the outgoing stream
if enabled via TCR1.2
7. TLINK and TLCLK are not synchronous with TSSYNC
123456789101112
1
2
3
6
TSSYNC
FRAME#
TLCLK
TSYNC
TSYNC
TSYNC
TLINK
13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5
4
TLCLK
TLINK
5