Datasheet

DS21352/DS21552
115 of 137
Figure 21-8 TRANSMIT SIDE D4 TIMING
Notes:
1. TSYNC in the frame mode (TCR2.3 = 0) and double-wide frame sync is not enabled (TCR2.4 = 0)
2. TSYNC in the frame mode (TCR2.3 = 0) and double-wide frame sync is enabled (TCR2.4 = 1)
3. TSYNC in the multiframe mode (TCR2.3 = 1)
4. TLINK data (Fs - bits) sampled during the F-bit position of even frames for insertion into the outgoing
T1 stream when enabled via TCR1.2
5. TLINK and TLCLK are not synchronous with TSSYNC
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1
2
3
4
TSSYNC
FRAME#
TLCLK
TSYNC
TSYNC
TSYNC
TLINK