Datasheet

DS2148/DS21Q48
32 of 73
CCR5 (04H): COMMON CONTROL REGISTER 5
(MSB) (LSB)
BPCS1 BPCS0 MM1 MM0 RSCLKE TSCLKE RT1 RT0
SYMBOL POSITION DESCRIPTION
BPCS1 CCR5.7 Backplane Clock Select 1. See Table 4-3 for details.
BPCS0 CCR5.6 Backplane Clock Select 0. See Table 4-3 for details.
MM1 CCR5.5 Monitor Mode 1. See Table 4-4
.
MM0 CCR5.4 Monitor Mode 0. See Table 4-4
.
RSCLKE CCR5.3 Receive Synchronization Clock Enable. This control bit determines
whether the line receiver should handle normal T1/E1 signals or a
synchronized signal.
E1
mode:
0 = receive normal E1 signal (Section 6 of G.703)
1 = receive 2.048 MHz synchronization signal (Section 10 of G.703)
T1 mode:
0 = receive normal T1 signal
1 = receive 1.544 MHz synchronization signal
TSCLKE CCR5.2 Transmit Synchronization Clock Enable. This control bit determines
whether the transmitter should transmit normal T1/E1 signals or a
synchronized signal.
E1 mode:
0 = transmit normal E1 signal (Section 6 of G.703)
1 = transmit 2.048 MHz synchronization signal (Section 10 of G.703)
T1 mode:
0 = transmit normal T1 signal
1 = transmit 1.544 MHz synchronization signal
RT1 CCR5.1 Receive Termination 1. See Table 4-5 for details.
RT0 CCR5.0 Receive Termination 0. See Table 4-5 for details.
Table 4-3. Backplane Clock Select
BPCS1
(CCR5.7)
BPCS0
(CCR5.6)
BPCLK
FREQUENCY
0 0 16.384MHz
0 1 8.192MHz
1 0 4.096MHz
1 1 2.048MHz
Table 4-4. Monitor Gain Settings
MM1
(CCR5.5)
MM0
(CCR5.4)
INTERNAL LINEAR GAIN
BOOST (dB)
0 0 Normal operation (no boost)
0 1 20
1 0 26
1 1 32