Datasheet

DS2148/DS21Q48
20 of 73
Table 2-8. Loopback Control in Hardware Mode
LOOPBACK SYMBOL CONTROL BIT LOOP1 LOOP0
Remote Loopback RLB CCR6.6 1 1
Local Loopback LLB CCR6.7 1 0
Analog Loopback ALB CCR6.4 0 1
No Loopback – – 0 0
Table 2-9. Transmit Data Control in Hardware Mode
TRANSMIT DATA SYMBOL
CONTROL
BIT
TX1 TX0
Transmit Unframed All Ones TUA1 CCR3.7 1 1
Transmit Alternating Ones and Zeros TAOZ CCR3.5 1 0
Transmit PRBS TPRBSE CCR3.4 0 1
TPOS and TNEG – – 0 0
Table 2-10. Receive Sensitivity Settings
EGL
(CCR4.4)
ETS
(CCR1.7)
RECEIVE SENSITIVITY
0 0 (E1) -12dB (short haul)
1 0 (E1) -43dB (long haul)
1 1 (T1) -30dB (limited long haul)
0 1 (T1) -36dB (long haul)
Table 2-11. Monitor Gain Settings
MM1
(CCR5.5)
MM0
(CCR5.4)
INTERNAL LINEAR
GAIN BOOST (dB)
0 0 Normal operation (no boost)
0 1 20
1 0 26
1 1 32
Table 2-12. Internal Rx Termination Select
RT1
(CCR5.1)
RT0
(CCR5.0)
INTERNAL RECEIVE
TERMINATION CONFIGURATION
0 0 Internal receive-side termination disabled
0 1
Internal receive-side 120Ω enabled
1 0
Internal receive-side 100Ω enabled
1 1
Internal receive-side 75Ω enabled
Table 2-13. MCLK Selection
MCLK
JAMUX
(CCR1.3)
ETS
(CCR1.7)
2.048MHz 0 0
2.048MHz 1 1
1.544MHz 0 1