Datasheet

DS21352/DS21552

110 of 137

Figure 21-2 RECEIVE SIDE ESF TIMING

Notes:

1. RSYNC in frame mode (RCR2.4 = 0) and double wide frame sync is not enabled (RCR2.5 = 0)

2. RSYNC in frame mode (RCR2.4 = 0) and double wide frame sync is enabled (RCR2.5 = 1)

3. RSYNC in multiframe mode (RCR2.4 = 1)

4. ZBTSI mode disabled (RCR2.6 = 0)

5. RLINK data (FDL bits) is updated one bit time before odd frames and held for two frames

6. ZBTSI mode is enabled (RCR2.6 = 1)

7. RLINK data (Z bits) is updated one bit time before odd frames and held for four frames

8. RLINK and RLCLK are not synchronous with RSYNC when the receive side elastic store is enabled

1 2 3 4 5 6 7 8 9 10 11 12

RFSYNC

FRAME#

TLCLK

RSYNC

TLINK

13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5

RLCLK

RLINK