Datasheet

DS21348/DS21Q348
20 of 76
NAME PIN I/O FUNCTION
TEST 26 I
Tri-State Control. Set high to tri-state all outputs and I/O pins
(including the parallel control port). Set low for normal operation.
Useful in board-level testing.
TNEG 42 I
Transmit Negative Data. Sampled on the falling edge (CES = 0) or
the rising edge (CES = 1) of TCLK for data to be transmitted out
onto the line.
TPD 13 I
Transmit Power-Down
0 = normal transmitter operation
1 = powers down the transmitter and tri-states the TTIP and TRING
pins
TPOS 41 I
Transmit Positive Data. Sampled on the falling edge (CES = 0) or
the rising edge (CES = 1) of TCLK for data to be transmitted out
onto the line.
TTIP/TRING 34/37 O
Transmit Tip and Ring [TTIP and TRING]. Analog line driver
outputs. These pins connect via a step-up transformer to the line.
See Section 5 for details.
TX0/TX1 14/15 I
Transmit Data Source Select Bits 0 and 1 [H/W Mode]. These
inputs determine the source of the transmit data. See Table 2-9.
VDD 21/36 — Positive Supply. 3.3V ±5%
VSM 20 I Voltage Supply Mode. Should be tied low for 3.3V operation.
VSS 22/35 —
Signal Ground
Note: G.703 requires an accuracy of ±50ppm for both T1 and E1. TR62411 and ANSI specs require an accuracy of ±32ppm for
T1 interfaces.