Datasheet

DS1985
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(Figure 11) should be applied for 480 s, after which the bus master returns the data line to an idle high
state controlled by the pullup resistor. Note that due to the high voltage programming requirements for
any 1-Wire EPROM device, it is not possible to multidrop non-EPROM based 1-Wire devices with the
DS1985 during programming. An internal diode within the non-EPROM based 1-Wire devices will
attempt to clamp the data line at approximately 8 volts and could potentially damage these devices.
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 9
480 s  t
RSTL
<  *
480 s  t
RSTH
<  (includes recovery time)
15 s  t
PDH
< 60 s
60 s  t
PDL
< 240 s
 In order not to mask interrupt signaling by other devices on the 1-Wire bus, t
RSTL
+ t
R
should always
be less than 960 s.
READ/WRITE TIMING DIAGRAM Figure 10
Write-1 Time Slot
60 s  t
SLOT
< 120 s
1 s  t
LOW1
< 15 s
1 s  t
REC
< 
RESISTOR
MASTER
RESISTOR
MASTER
DS1985