Datasheet

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
74Maxim Integrated
A2h Table 02h, Register C1h: PW_ENB
FACTORY DEFAULT 03h
READ ACCESS PW2 or (PW1 and RWTBL246) or (PW1 and RBL246)
WRITE ACCESS PW2 or (PW1 and RWTBL246)
MEMORY TYPE Nonvolatile (SEE)
C1h RWTBL46 RTBL1C RTBL2 RTBL1A RTBL1B WPW1 WAUXAU WAUXBU
BIT 7 BIT 0
BIT 7
RWTBL46: Read and write Tables 04h and 06h.
0 = (Default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 6
RTBL1C: Read A2h Table 01h or A2h Table 05h, Registers F8h–FFh. Table address is dependent
on the MASK bit (A2h Table 02h, Register 89h).
0 = (Default) Read access for PW2 only.
1 = Read access for both PW1 and PW2.
BIT 5
RTBL2: Read A2h Table 02h except for PW1 value locations (A2h Table 02h, Registers B0h–B3h).
0 = (Default) Read access for PW2 only.
1 = Read access for both PW1 and PW2.
BIT 4
RTBL1A: Read A2h Table 01h, Registers 80h–BFh.
0 = (Default) read access for PW2 only.
1 = Read access for both PW1 and PW2.
BIT 3
RTBL1B: Read A2h Table 01h, Registers C0h-F7h.
0 = (Default) read access for PW2 only.
1 = Read access for both PW1 and PW2.
BIT 2
WPW1: Write register PW1 (A2h Table 02h, Registers B0h–B3h). For security purposes these
registers are not readable.
0 = (Default) Write access for PW2 only.
1 = Write access for both PW1 and PW2.
BIT 1
WAUXAU: Write auxiliary memory, Registers 00h–7Fh. All users can read this area (see also A2h
Table 02h, Register C0h, PW_ENA).
0 = Write access for PW2 only.
1 = (Default) Write access for user, PW1, and PW2.
BIT 0
WAUXBU: Write auxiliary memory, Registers 80h–FFh. All users can read this area (see also A2h
Table 02h, Register C0h, PW_ENA)
0 = Write access for PW2 only.
1 = (Default) Write access for user, PW1, and PW2.