Datasheet

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
7Maxim Integrated
TABLE OF CONTENTS (continued)
A2h Table 02h, Register EFh: 3WSET ........................................................83
A2h Table 02h, Register F0h: 3WCTRL
.......................................................84
A2h Table 02h, Register F1h: ADDRESS
......................................................84
A2h Table 02h, Register F2h: WRITE
.........................................................85
A2h Table 02h, Register F3h: READ
.........................................................85
A2h Table 02h, Register F4h: TXSTAT2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
A2h Table 02h, Register F5h: TXSTAT1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
A2h Table 02h, Register F6h: DPCSTAT
......................................................86
A2h Table 02h, Register F7h: RXSTAT
........................................................86
A2h Table 02h, Register F8h–FFh: RESERVED
.................................................86
A2h Table 04h Register Descriptions
............................................................87
A2h Table 04h, Register 80h–A7h: MODULATION or TXCTRL5 LUT
................................87
A2h Table 04h, Register A8h–EFh: EMPTY
....................................................87
A2h Table 04h, Register F0h–F7h: MOD MAX LUT
.............................................87
A2h Table 04h, Register F8h–FFh: MOD OFFSET or SET_IMOD LUT
...............................88
A2h Table 06h Register Descriptions
............................................................88
A2h Table 06h, Register 80h–A7h: BIAS or SET_IBIAS
..........................................88
A2h Table 06h, Register A8h–EFh: EMPTY
....................................................89
A2h Table 06h, Register F0h–F7h: BIAS MAX LUT
..............................................89
A2h Table 06h, Register F8h–FFh: BIAS OFFSET or APC LUT
.....................................89
A2h Table 08h Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
A2h Table 08h, Register 80h–F7h: EMPTY
....................................................90
A2h Table 08h, Register F8h–FFh: INCBYTE
..................................................90
A2h Table 09h Register Descriptions
............................................................90
A2h Table 09h, Register 80h–F7h: EMPTY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
A2h Table 09h, Register F8h–FFh: DAC OFFSET LUT
...........................................90
Auxiliary Memory A0h Register Description
.......................................................91
Auxiliary Memory A0h, Register 00h–FFh: EEPROM
.............................................91
Applications Information
........................................................................ 91
Power-Supply Decoupling
.....................................................................91
Layout Considerations
........................................................................91
SDA and SCL Pullup Resistors
.................................................................91
Ordering Information
.......................................................................... 91
Package Information
........................................................................... 91
Revision History
.............................................................................. 92