Datasheet

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
67Maxim Integrated
A2h Table 02h, Register 8Dh: CNFGD
A2h Table 02h, Register 8Eh: RIGHT-SHIFT
1
(RSHIFT
1
)
FACTORY DEFAULT 00h
READ ACCESS PW2 or (PW1 and RWTBL246) or (PW1 and RBL246)
WRITE ACCESS PW2 or (PW1 and RWTBL246)
MEMORY TYPE Nonvolatile (SEE)
8Dh INV_DAC RESERVED RESERVED RESERVED DS1863_MODE POW_LEV_DS1863
BIT 7 BIT 0
BIT 7
INV_DAC:
0 = DAC output is inverted.
1 = DAC output is not inverted.
BITS 6:4
RESERVED
BIT 3
DS1863_MODE:
0 = Normal operation. Power leveling defined in A2h Lower Memory, Register 6Fh.
1 = DS1863 mode. This mode is usually used for systems upgrading from the DS1863. In this mode,
KRMD[2:0] in the MAX3710 is directly written to by the POW_LEV_DS1863 bits.
BITS 2:0
POW_LEV_DS1863[2:0] POWER LEVEL (dB)
000 0
001 0
010 0
011 -3
100 -3
101 -3
110 -6
111 -6
FACTORY DEFAULT 00h
READ ACCESS PW2 or (PW1 and RWTBL246) or (PW1 and RBL246)
WRITE ACCESS PW2 or (PW1 and RWTBL246)
MEMORY TYPE Nonvolatile (SEE)
8Eh RESERVED TXB
2
TXB
1
TXB
0
RESERVED TXP
2
TXP
1
TXP
0
BIT 7 BIT 0
Allows for right-shifting the final answer of TXB and TXP voltage measurements. This allows for scaling the
measurements to the smallest full-scale voltage and then right-shifting the final result so the reading is weighted to
the correct LSB.