Datasheet

DS1886
SFP and PON ONU Controller
with Digital LDD Interface
13Maxim Integrated
I
2
C AC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.97V to +3.63V, T
A
= -40NC to +95NC, unless otherwise noted. Timing is referenced to V
IL(MAX)
and V
IH(MIN)
.) (Note 1) (See
Figure 19.)
NONVOLATILE MEMORY CHARACTERISTICS
(V
CC
= +2.97V to +3.63V, unless otherwise noted.) (Note 1)
Note 1: Limits are production tested at T
A
= +25°C. Limits over the operating temperature range and relevant supply voltage
range are guaranteed by design and characterization. Typical values are not guaranteed.
Note 2: All voltages are referenced to ground. Current entering the IC is considered positive, and current exiting the IC is consid-
ered negative.
Note 3: Inputs are at supply rail. Outputs are not loaded. Does not include REFIN current. Measured using the Typical Operating
Circuit—GPON ONU.
Note 4: The ADC output is available internally as a 16-bit value. The 16 bits are derived by left-shifting the 13-bit ADC output by 3.
Note 5: Guaranteed by design.
Note 6: TXB (transmit bias) and TXP (transmit power) are separate ADC conversions that are performed on the same input pin, TXMON.
Note 7: Full scale is user-programmable.
Note 8: Time until faults are cleared (falling edge of TXFOUT).
Note 9: Time until rising edge of TXDOUT.
Note 10: Time until falling edge of TXDOUT.
Note 11: Time until completion of initial MAX3710 control registers configuration.
Note 12: Time until completion of initial MAX3945 and MAX3710 control registers configuration.
Note 13: VCC LO alarm or warning is enabled, a V
CC
conversion is completed, and V
CC
is above VCC LO alarm or warning. See
Figure 12c.
Note 14: DAC output valid, 3-wire writes from LUTs complete, and digital outputs valid.
Note 15: I
2
C interface timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I
2
C stan-
dard mode.
Note 16: C
B
= Total capacitance of one bus line in pF.
Note 17: EEPROM write begins after a STOP condition occurs.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCL Clock Frequency f
SCL
(Note 15) 0 400 kHz
Clock Pulse-Width Low t
LOW
1.3
Fs
Clock Pulse-Width High t
HIGH
0.6
Fs
Bus Free Time Between STOP and
START Condition
t
BUF
1.3
Fs
START Hold Time t
HD:STA
0.6
Fs
START Setup Time t
SU:STA
0.6
Fs
Data in Hold Time t
HD:DAT
0 0.9
Fs
Data in Setup Time t
SU:DAT
100 ns
Rise Time of Both SDA and SCL
Signals
t
R
(Note 16)
20 +
0.1C
B
300 ns
Fall Time of Both SDA and SCL
Signals
t
F
(Note 16)
20 +
0.1C
B
300 ns
STOP Setup Time t
SU:STO
0.6
Fs
Capacitive Load for Each Bus Line C
B
400 pF
EEPROM Write Time t
W
(Note 17) 20 ms
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
EEPROM Write Cycles
At T
A
= +25NC
50,000
—
At T
A
= +85NC
10,000