Datasheet

DS1878
SFP+ Controller with Digital LDD Interface
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FACTORY DEFAULT 00h
READ ACCESS PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS PW2 or (PW1 and RWTBL246)
MEMORY TYPE Nonvolatile (SEE)
BEh 2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
BIT 7 BIT 0
Fast-comparison DAC threshold adjust for high LOS. The combination of HLOS and LLOS creates a hysteresis
comparator. As RSSI falls below the LLOS threshold, the LOS LO alarm bit is set to 1. The LOS alarm remains set
until the RSSI input is found above the HLOS threshold setting, which clears the LOS LO alarm bit and sets the
LOS HI alarm bit. At power-on, both LOS LO and LOS HI alarm bits are 0 and the hysteresis comparator uses the
LLOS threshold setting.
FACTORY DEFAULT 00h
READ ACCESS PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS PW2 or (PW1 and RWTBL246)
MEMORY TYPE Nonvolatile (SEE)
BFh 2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
BIT 7 BIT 0
Fast-comparison DAC threshold adjust for low LOS. See HLOS (Table 02h, Register BEh) for functional description.
Table 02h, Register BEh: HLOS
Table 02h, Register BFh: LLOS