Datasheet

DS1859
Dual, Temperature-Controlled Resistors with
Internally Calibrated Monitors
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MEMORY
LOCATION
(hex)
EEPROM/
SRAM
R/W
DEFAULT
SETTING
(hex)
NAME OF LOCATION
FUNCTION
3——— X —
2——— X —
1——— X —
0——— MINT
A mask of all flags located in Table 01 byte
88h determines the value of MINT. MINT is
maskable to 0 if no interrupt is desired by
setting Table 01 byte 88h to 0.
72 to 73 SRAM — — Reserved —
74 SRAM R — Warning flags —
Bit 7 — — — TMPhi
This warning flag goes high when the upper
limit of the temperature setting is violated.
6——— TMPlo
This warning flag goes high when the lower
limit of the temperature setting is violated.
5——— V
CC
hi
This warning flag goes high when the upper
limit of the V
CC
setting is violated.
4——— V
CC
lo
This warning flag goes high when the lower
limit of the V
CC
setting is violated.
3——— MON1hi
This warning flag goes high when the upper
limit of the MON1 setting is violated.
2——— MON1lo
This warning flag goes high when the lower
limit of the MON1 setting is violated.
1——— MON2hi
This warning flag goes high when the upper
limit of the MON2 setting is violated.
0——— MON2lo
This warning flag goes high when the lower
limit of the MON2 setting is violated.
Main Device (continued)