Datasheet

Dual, Temperature-Controlled Resistors with Inter-
nally Calibrated Monitors and Password Protection
Maxim Integrated 9
DS1856
DEVICE
ADDRESS
AD (AUXILIARY DEVICE ENABLE A0h)
MD (MAIN DEVICE ENABLE)
DEVICE ADDRESS
ADDRESS
ADDRESS
ADDRESS
R/W
R/W
TxF
DATA BUS
R/W
TxF
RxL
LOS
ADEN ADFIX
SDA
SCL
IN1
OUT1
2-WIRE
INTERFACE
MINT
INV1
Tx FAULT
IN2
MON2
MON1
MON3
V
CC
GND
OUT2
INV2
EEPROM
128 x 8 BIT
STANDARDS
IF ADEN = 0,
[00h - 7Fh OF AD]
IF ADEN = 1,
[80h-FFh OF MD,
TABLE 00/01h]
AD MD
ADDRESS
TABLE
SELECT
TABLE
SELECT
R/W
EEPROM
72 x 8 BIT
80h-C7h
TABLE 04
RESISTOR 0
LOOK-UP
TABLE
MD
EEPROM
96 x 8 BIT
00h-5Fh
LIMITS
SRAM
32 x 8 BIT
60h-7Fh
MD
TEMP INDEX
ADEN (BIT)
ALARM FLAGS
WARNING FLAGS
MUX
CTRL
MEASUREMENT
ADDRESS
TABLE
SELECT
R/W
EEPROM
72 x 8 BIT
80h-C7h
TABLE 05
RESISTOR 1
LOOK-UP
TABLE
MD
TEMP INDEX
MONITORS LIMIT
HIGH
MONITORS LIMIT
LOW
TABLE SELECT
TEMP INDEX
MINT (BIT)
INTERNAL
TEMP
V
CC
MUX
ADC
12-BIT
INTERNAL
CALIBRATION
A/D
CTRL
V
CC
COMPARATOR
MEASUREMENT
ALARM FLAGS
WARNING FLAGS
MONITORS LIMIT LOW
MONITORS LIMIT HIGH
COMP CTRL
INTERRUPT
MINT
TABLE 03
EEPROM
80h-B7h
VENDOR
MD R/W
DEVICE ADDRESS
ADDRESS
TABLE SELECT
MASKING (TMP, V
CC
, MON1, MON2, MON3)
ADFIX (BIT)
ADEN (BIT)
INV2 (BIT)
INV1 (BIT)
RESISTOR 0
256 POSITIONS
L0
H0
REGISTERREGISTER
RESISTOR 1
256 POSITIONS
L1
H1
RIGHT
SHIFTING
DS1856
Figure 1. Block Diagram