Datasheet

DS1673
4 of 18
POWER-UP/POWER-DOWN CONSIDERATIONS
When V
CC
is applied to the DS1673 and reaches a level greater than V
CCTP
(power-fail trip point), the
device becomes fully accessible after t
RPU
(250ms typical). Before t
RPU
elapses, all inputs are disabled.
When V
CC
drops below V
CCSW
, the device is switched over to the V
BAT
supply.
During power-up, when V
CC
returns to an in-tolerance condition, the RST pin is kept in the active state
for 250ms (typical) to allow the power supply and microprocessor to stabilize.
ADDRESS/COMMAND BYTE
The command byte for the DS1673 is shown in Figure 2. Each data transfer is initiated by a command
byte. Bits 0 through 6 specify the address of the registers to be accessed. The MSB (bit 7) is the
Read/Write bit. This bit specifies whether the accessed byte will be read or written. A read operation is
selected if bit 7 is a 0 and a write operation is selected if bit 7 is a one. The address map for the DS1673 is
shown in Figure 3.
ADDRESS/COMMAND BYTE Figure 2