Datasheet
DS1558
2 of 18
PIN DESCRIPTION
PIN NAME FUNCTION
1, 13, 39
N.C. No Connection
41, 4
3
2 A18
3 A16
4 A14
5 A12
6 A7
7 A6
8 A5
9 A4
10 A3
11 A2
12 A1
14 A0
27 A10
29 A11
30 A9
31 A8
32 A13
36 A15
44 A17
r Ad ess Decode. T e inputs to determine
read o write cycle should cted to the attached SRAM or to the
Address Inputs fo
whether or not a
RTC registers.
dr h DS1558 uses the address
r be dire
15 DQ0
16 DQ1
17 DQ2
19 DQ3
20 DQ4
21 DQ5
22 DQ6
23 DQ7
Data Input/Outputs. Data input/output pins for the RTC registers.
18, 45,
48
GND Ground
24
CER
Active-Low Chip-Enable RAM. CE is passed through to CER, with an added
propagation delay. When the signals on A0–A18 match an RTC address, CER is held
high, disabling the SRAM. If OE is also low, the RTC outputs data on DQ0–DQ7.
25
OER
Active-Low Output-Enable RAM. OE is passed through to OER, with an added
propagation delay. When the signals on A0–A18 match an RTC address, CER is held
high, disabling the SRAM. If CE is also low, the RTC outputs data on DQ0–DQ7.
26
CE
Active-Low Chip-Enable Input. Used to access the RTC and the external SRAM.
28
OE
Active-Low Output-Enable Input. Used to access the RTC and the external SRAM.
33
IRQ/FT
Active-Low Interrupt/Frequency-Test Output. This pin is used to output the alarm
interrupt or the frequency test signal. It is open drain and requires an external pullup
resistor.
34
WE
Active-Low Write Enable. Used to write data to the RTC registers.










