Datasheet

Figure 1a. Timing Diagram—SPI Read Transfer (Mode 3)
Figure 1b. Timing Diagram—SPI Read Transfer (Mode 0)
CS
CPHA = 1
SCLK
t
CC
t
DC
t
R
t
F
t
CDD
t
CDZ
t
CDH
t
CL
t
CH
DIN
W/R
A6
A0
D0
WRITE ADDRESS BYTE
NOTE: SCLK CAN BE EITHER POLARITY SHOWN FOR CPOL = 1.
DOUT
D7
READ DATA BYTE
HIGH IMPEDANCE
CS
CPHA = 0
SCLK
t
CC
t
DC
t
R
t
F
t
CDD
t
CDZ
t
CDH
t
CL
t
CH
DIN
W/R
A6
A0
D0
WRITE ADDRESS BYTE
NOTE: SCLK CAN BE EITHER POLARITY SHOWN FOR CPOL = 0.
DOUT
D7
READ DATA BYTE
HIGH IMPEDANCE
V
BACKUP
(V)
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Maxim Integrated │ 4
DS1390–DS1394 Low-Voltage SPI/3-Wire RTCs
with Trickle Charger