Datasheet

The INTCN bit used in the DS1390/DS1393/DS1394
becomes the SQW pin-enable bit in the DS1392. This bit
powers up a zero, making SQW active.
Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit
indicates that the oscillator has stopped or was stopped
for some time and may be used to judge the validity of the
clock and calendar data. This bit is edge-triggered and is
set to logic 1 when the internal circuitry senses the oscil-
lator has transitioned from a normal run state to a STOP
condition. The following are examples of conditions that
can cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on V
CC
and V
BACKUP
is insuf-
ficient to support oscillation.
3) The EOSC bit is turned off.
4) External influences on the crystal (i.e., noise, leakage,
etc.).
This bit remains at logic 1 until written to logic 0. This bit
can only be written to logic 0. Attempting to write OSF to
logic 1 leaves the value unchanged.
Bit 0: Alarm Flag (AF). A logic 1 in the AF bit indicates
that the time matched the alarm registers. If the AIE bit is
logic 1 and the INTCN bit is set to logic 1, the SQW/INT
pin is also asserted. AF is cleared when written to logic 0.
This bit can only be written to logic 0. Attempting to write
to logic 1 leaves the value unchanged.
Trickle-Charge Register (0F/8Fh)
The simplified schematic in Figure 8 shows the basic
components of the trickle charger. The trickle-charge
select (TCS) bits (bits 4 to 7) control the selection of the
trickle charger. To prevent accidental enabling, only a pat-
tern on 1010 enables the trickle charger. All other patterns
disable the trickle charger. The trickle charger is disabled
when power is first applied. The diode-select (DS) bits
(bits 2 and 3) select whether or not a diode is connected
between V
CC
and V
BACKUP
. If DS is 01, no diode is
selected or if DS is 10, a diode is selected. The ROUT bits
(bits 0 and 1) select the value of the resistor connected
between V
CC
and V
BACKUP
. Table 5 shows the resistor
selected by the resistor-select (ROUT) bits and the diode
selected by the diode-select (DS) bits.
Table 5. Trickle-Charge Register
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
EOSC 0 BBSQI RS2 RS1 ESQW 0 AIE
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
OSF 0 0 0 0 0 0 AF
TCS3 TCS2 TCS1 TCS0 DS1 DS0 ROUT1 ROUT0 FUNCTION
X X X X 0 0 X X Disabled
X X X X 1 1 X X Disabled
X X X X X X 0 0 Disabled
1 0 1 0 0 1 0 1 No diode, 250Ω resistor
1 0 1 0 1 0 0 1 One diode, 250Ω resistor
1 0 1 0 0 1 1 0 No diode, 2kΩ resistor
1 0 1 0 1 0 1 0 One diode, 2kΩ resistor
1 0 1 0 0 1 1 1 No diode, 4kΩ resistor
1 0 1 0 1 0 1 1 One diode, 4kΩ resistor
0 0 0 0 0 0 0 0 Initial default value—disabled
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Maxim Integrated │ 19
DS1390–DS1394 Low-Voltage SPI/3-Wire RTCs
with Trickle Charger
Control Register (0D/8Dh) (DS1392 Only)
Status Register (0E/8Eh)