Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsIntegrated Circuits (ICs)Timer IC t- real time clock Clock/calendar SOIC 8 N

C RTC/Supervisor with Trickle Charger

and 512 Bytes EEPROM

6 Maxim Integrated

DS1388

WARNING: Under no circumstances are negative undershoots, of any

amplitude, allowed when device is in write protection.

Note 2: Limits at -40°C are guaranteed by design and are not production tested.

Note 3: All voltages are referenced to ground.

Note 4: Measured at V

= typ, V

BACKUP

= 0V, register 0Ah, block 0h = A5h.

Note 5: The use of the 250Ω trickle-charge resistor is not allowed at V

> 3.63V and should not be enabled.

Note 6: Measured at V

= typ, V

BACKUP

= 0V, register 0Ah, block 0h = A6h.

Note 7: Measured at V

= typ, V

BACKUP

= 0V, register 0Ah, block 0h = A7h.

Note 8: The RST pin has an internal 50kΩ pullup resistor to V

Note 9: I

CCA

—SCL clocking at max frequency = 400kHz.

Note 10: Specified with I

C bus inactive.

Note 11: Measured with a 32.768kHz crystal attached to X1 and X2.

Note 12: After this period, the first clock pulse is generated.

Note 13: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V

IHMIN

of the SCL signal)

to bridge the undefined region of the falling edge of SCL.

Note 14: The maximum t

HD:DAT

need only be met if the device does not stretch the LOW period (t

LOW

) of the SCL signal.

Note 15: A fast-mode device can be used in a standard-mode system, but the requirement t

SU:DAT

≥ 250ns must then be met. This

is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the

LOW period of the SCL signal, it must output the next data bit to the SDA line t

R(MAX)

SU:DAT

= 1000 + 250 = 1250ns

before the SCL line is released.

Note 16: C

—total capacitance of one bus line in pF.

Note 17: The parameter t

OSF

is the period of time that the oscillator must be stopped for the OSF flag to be set over the voltage

range of 0V ≤ V

≤ V

CC(MAX)

and 1.3V ≤ V

BACKUP

≤ 3.7V.

Note 18: If the oscillator is disabled or stopped, RST goes inactive after t

RST

plus the startup time of the oscillator.