Datasheet

DS1339 I
2
C Serial Real-Time Clock
6 of 20
Figure 2. Timing Diagram
Figure 3. Block Diagram
ALARM,
TRICKLE
CHARGE, AND
CONTROL
REGISTERS
SERIAL BUS
INTERFACE AND
ADDRESS
REGISTER
CONTROL
LOGIC
1Hz
1Hz/4.096kHz/8.192kHz/32.768kHz
MUX/
BUFFER
USER BUFFER
(7 BYTES)
CLOCK AND
CALENDAR
REGISTERS
Power Control
X
1
C
L
C
L
X
2
DS1339
SQW/INT
V
CC
V
BACKUP
SCL
SDA
GND
Oscillator
and
divider
"C" version only
N