Datasheet

Clock Accuracy
The accuracy of the clock is dependent upon the accuracy
of the crystal and the accuracy of the match between the
capacitive load of the oscillator circuit and the capacitive
load for which the crystal was trimmed. Additional error is
added by crystal frequency drift caused by temperature
shifts. External circuit noise coupled into the oscillator
circuit may result in the clock running fast. Figure6 shows
a typical PC board layout for isolating the crystal and
oscillator from noise. Refer to
ApplicationNote58:Crystal
Considerations with Dallas Real-Time Clocks for detailed
information
RTC Address Map
Table 3 shows the address map for the device registers.
During a multibyte access, when the address pointer
reaches the end of the register space (10h), it wraps
around to location 00h. On an I
2
C START or address
pointerincrementingtolocation 00h,thecurrenttimeis
transferred to a second set of registers. The time infor-
mation is read from these secondary registers, while the
clock may continue to run. This eliminates the need to
re-read the registers in case of an update of the main
registers during a read.
Time and Date Operation
The time and date information is obtained by reading the
appropriate register bytes. Table 3 shows the RTC reg-
isters.Thetimeanddatearesetorinitializedbywriting
the appropriate register bytes. The contents of the time
and date registers are in the BCD format. The device can
be run in either 12-hour or 24-hour mode. Bit 6 of the
HOURSregisterisdefinedasthe12-or24-hourmode-
selectbit.Whenhigh,the12-hourmodeisselected.Inthe
12-hourmode,bit5istheAM/PM bit with logic high being
PM.Inthe24-hourmode,bit5isthe20-hourbit(20to
23 hours). All hours values, including the alarms, must be
re-entered whenever the 12/24-hour mode bit is changed.
TheCenturybit(bit7oftheMONTHregister)istoggled
whentheYEARregister overflowsfrom99to00.Ifthe
Century bit is logic 0, the year will be designated as a
LeapYearandFebruarywillcontain29days.
If the Century bit is logic 1, the year will not be designated
asaLeapYearandFebruarywillcontain28days.
TheDay-Of-Weekregisterincrementsatmidnight.Values
that correspond to the day of week are user-defined, but
must be sequential (i.e., if 1 equals Sunday, then 2 equals
Monday and so on). Illogical time and date entries result
in undefined operation.
When reading or writing the time and date registers,
secondary (user) buffers are used to prevent errors when
theinternalregistersupdate.Whenreadingthetimeand
dateregisters, the userbuffersare synchronized tothe
internal registers on a START or when the address pointer
rollsoverto00h.Thecountdownchainisresetwhenever
thesecondsregisteriswritten.Writetransfersoccurson
the acknowledge pulse from the device. To avoid rollover
issues, once the countdown chain is reset, the remaining
time and date registers must be written within one sec-
ond.Ifenabled,the1Hzsquare-waveoutputtransitions
high500msafterthesecondsdatatransfer,providedthe
oscillator is already running.
DS1339B Low-Current, I
2
C, Serial Real-Time Clock
For High-ESR Crystals
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