Datasheet

Detailed Description
The DS1339B serial real-time clock (RTC) is a low-
power clock/date device with two programmable time-
of-day alarms and a programmable square-wave output.
Address and data are transferred serially through an I
2
C
bus. The clock/date provides seconds, minutes, hours,
day, date, month, and year information. The date at the
end of the month is automatically adjusted for months
with fewer than 31 days, including corrections for leap
year. The clock operates in either the 24-hour or 12-hour
format with AM/PM indicator. The device has a built-in
power-sense circuit that detects power failures and auto-
matically switches to the backup supply, maintaining time,
date, and alarm operation.
Operation
The device operates as a slave device on the serial bus.
Access is obtained by implementing a START condition
and providing a device identification code followed by
data. Subsequent registers can be accessed sequentially
until a STOP condition is executed. The device is fully
accessibleanddatacanbewrittenandreadwhenV
CC
is greater than V
PF
. However, when V
CC
falls below
V
PF
, the internal clock registers are blocked from any
access.IfV
PF
islessthanV
BACKUP
, the device power is
switchedfromV
CC
toV
BACKUP
whenV
CC
drops below
V
PF
.IfV
PF
isgreaterthanV
BACKUP
, the device power
is switched from V
CC
 to V
BACKUP
 when V
CC
drops
belowV
BACKUP
. The registers are maintained from the
V
BACKUP
sourceuntilV
CC
is returned to nominal levels.
The Functional Diagram shows the main elements of the
serial real-time clock.
Power Control
The power-control function is provided by a precise,
temperature-compensated voltage reference and a com-
paratorcircuitthatmonitorstheV
CC
level. The device is
fully accessible and data can be written and read when
V
CC
isgreaterthanV
PF
.However,whenV
CC
falls below
V
PF
, the internal clock registers are blocked from any
access.IfV
PF
islessthanV
BACKUP
, the device power is
switchedfromV
CC
toV
BACKUP
whenV
CC
drops below
V
PF
.IfV
PF
isgreaterthanV
BACKUP
, the device power
is switched from V
CC
 to V
BACKUP
 when V
CC
drops
belowV
BACKUP
. The registers are maintained from the
V
BACKUP
sourceuntilV
CC
is returned to nominal levels
(Table 1
).AfterV
CC
returns aboveV
PF
, read and write
access is allowed after t
REC
(Figure2).Onthefirstappli-
cation of power to the device the time and date registers
are reset to 01/01/00 01 00:00:00 (DD/MM/YY DOW
HH:MM:SS).
Oscillator Circuit
The device uses an external 32.768kHz crystal. The
oscillator circuit does not require any external resistors
or capacitors to operate. Table 2 specifies several crys-
tal parameters for the external crystal. The Functional
Diagram shows a basic schematic of the oscillator circuit.
The startup time is usually less than 1 second when using
a crystal with the specified characteristics.
Table 1. Power Control
Table 2. Crystal Specifications*
*The crystal, traces, and crystal input pins should be isolated
from RF generating signals. Refer to
ApplicationNote58:
Crystal Considerations for Dallas Real-Time Clocks for addi-
tional specifications.
SUPPLY CONDITION
READ/
WRITE
ACCESS
POWERED
BY
V
CC
<V
PF
,V
CC
<V
BACKUP
No V
BACKUP
V
CC
<V
PF
,V
CC
>V
BACKUP
No V
CC
V
CC
>V
PF
,V
CC
<V
BACKUP
Yes V
CC
V
CC
>V
PF
,V
CC
>V
BACKUP
Yes V
CC
PARAMETER SYMBOL MIN TYP MAX UNITS
Nominal
Frequency
f
O
32.768 kHz
Series Resistance ESR 100 kΩ
Load
Capacitance
C
L
6 pF
DS1339B Low-Current, I
2
C, Serial Real-Time Clock
For High-ESR Crystals
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