Datasheet
Manipulating the Address Counter for Reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master
generates a START condition, writes the slave address
byte (R/W
= 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOPcondition.SeeFigure5forareadexampleusing
the repeated START condition to specify the starting
memory location.
Reading Multiple Bytes From a Slave: The read
operation can be used to read multiple bytes with a
singletransfer.Whenreadingbytesfromtheslave,the
master simply ACKs the data byte if it desires to read
another byte before terminating the transaction. After
the master reads the last byte it must NACK to indicate
theendofthetransferandthenitgeneratesaSTOP
condition.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the device,
decouple the V
CC
power supply with a 0.01µF and/or
0.1µF capacitor. Use a high-quality, ceramic, surface-
mount capacitor if possible. Surface-mount components
minimizeleadinductance,whichimprovesperformance,
and ceramic capacitors tend to have adequate high-
frequency response for decoupling applications.
Using an Open-Drain Output
TheSQW/INT output is open-drain and therefore requires
anexternal pullupresistorto realizea logic-highoutput
level.
SDA and SCL Pullup Resistors
SDAisanopen-drainoutputandrequiresanexternalpul-
lupresistortorealizealogic-highoutputlevel.
Because the device does not use clock cycle stretching,
a master using either an open-drain output with a pullup
resistororCMOSoutputdriver(push-pull)couldbeused
forSCL.
Battery Charge Protection
The device contains Maxim’s redundant battery-charge
protectioncircuittoprevent anychargingofanexternal
battery.TheDS1339BisrecognizedbytheUnderwriters
Laboratories(UL)underfileE141114.
Handling, PCB Layout, and Assembly
Avoid running signal traces under the package, unless a
ground plane is placed between the package and the sig-
nalline.Donotuseexternalcomponentstocompensate
for improper crystal selection.
Moisture-sensitive packages are shipped from the factory
dry-packed.Handling instructions listedon thepackage
label must be followed to prevent damage during reflow.
Refer to the IPC/JEDEC J-STD-020 standard for mois-
ture-sensitive device (MSD) classifications.
Figure 6. Typical PCB Layout for Crystal
CRYSTAL
X1
X2
LOCAL GROUND PLANE (LAYER 2)
DS1339B Low-Current, I
2
C, Serial Real-Time Clock
For High-ESR Crystals
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