Datasheet

DS1338 I
2
C RTC with 56-Byte NV RAM
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whenever the seconds register is written. Write transfers occur on the acknowledge from the DS1338. Once the
countdown chain is reset, to avoid rollover issues the remaining time and date registers must be written within
1 second. The 1Hz square-wave output, if enabled, transitions high 500ms after the seconds data transfer,
provided the oscillator is already running.
The DS1338 runs in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12-hour or 24-hour
mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit, with logic
high being PM. In the 24-hour mode, bit 5 is the 20-hour bit (20–23 hours). If the 12/24-hour mode select is
changed, the hours register must be re-initialized to the new format.
On an I
2
C START, the current time is transferred to a second set of registers. The time information is read from
these secondary registers, while the clock continues to run. This eliminates the need to re-read the registers in
case of an update of the main registers during a read.
Table 3. RTC and RAM Address Map
ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 FUNCTION RANGE
00H
CH
10 Seconds
Seconds
Seconds
00–59
01H
0
10 Minutes
Minutes
Minutes
00–59
02H 0 12/24
AM/PM
10
Hour
Hour Hours
1–12
+AM/PM
00–23
20 Hour
03H
0
0
0
0
0
Day
Day
1–7
04H
0
0
10 Date
Date
Date
01–31
05H 0 0 0
10
Month
Month Month 01–12
06H
10 Year
Year
Year
00–99
07H
OUT
0
OSF
SQWE
0
0
RS1
RS0
Control
08H–3FH RAM 56 x 8 00H–FFH
Note: Bits listed as “0” always read as a 0.