Datasheet

DS1318
Parallel-Interface Elapsed Time Counter
4 _____________________________________________________________________
VALID
DQ0–DQ7
OE
CE
A0–A4
t
RC
t
AA
t
CEA
t
CEZ
t
OH
t
OEZ
t
OEL
t
CEL
t
OEA
Read Cycle Timing
t
WC
t
WEW
t
WEZ
t
DS
t
DH
t
WR
t
AS
t
AS
t
AH
DATA INPUT
DQ0–DQ7
WE
CE
A0–A4
DATA OUTPUT DATA INPUT
VALID VALID
Write Cycle Timing, Write-Enable Controlled
t
WC
t
DS
t
DH
t
WR
t
AS
t
AS
t
CEW
t
AH
DATA INPUT
DQ0–DQ7
WE
CE
A0–A4
DATA INPUT
VALID VALID
Write Cycle Timing, Chip-Enable Controlled