Datasheet
Table Of Contents
- BENEFITS AND FEATURES
- PIN CONFIGURATIONS
- ORDERING INFORMATION
- DESCRIPTION
- PIN DESCRIPTION
- OPERATION
- READING FROM THE CLOCK REGISTERS
- SPECIAL PURPOSE REGISTERS
- CONTROL REGISTER (READ 0Fh, WRITE 8Fh)
- TRICKLE CHARGE REGISTER (READ 11H, WRITE 91H)
- Figure 3. PROGRAMMABLE TRICKLE CHARGER
- POWER CONTROL
- Figure 4. POWER-SUPPLY CONFIGURATIONS
- SERIAL PERIPHERAL INTERFACE (SPI)
- ADDRESS AND DATA BYTES
- Figure 6. SPI SINGLE-BYTE WRITE
- Figure 7. SPI SINGLE-BYTE READ
- Figure 8. SPI MULTIPLE-BYTE BURST TRANSFER
- FUNCTION
- READING AND WRITING IN BURST MODE
- OPERATING RANGE
- RECOMMENDED DC OPERATING CONDITIONS (Over the operating range, unless otherwise specified.)
- DC ELECTRICAL CHARACTERISTICS (Over the operating range, unless otherwise specified.)
- CAPACITANCE (TA = +25C)
- Figure 10. TIMING DIAGRAM: 3-WIRE READ DATA TRANSFER
- SPI AC ELECTRICAL CHARACTERISTICS (Over the operating range, unless otherwise specified.) (Figure 12 and Figure 13)
- Figure 13. TIMING DIAGRAM: SPI WRITE DATA TRANSFER
- NOTES:
- REVISION HISTORY
DS1305
RECOMMENDED LAYOUT FOR CRYSTAL
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application
Note 58, “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.
Table 1. Crystal Specifications
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Nominal Frequency
f
O
32.768
kHz
Series Resistance
ESR
45
kΩ
Load Capacitance
C
L
6
pF
Note: The crystal, traces, and crystal input pins should be isolated from RF generating signals. Refer to
Applications Note 58: Crystal Considerations for Dallas Real-Time Clocks for additional specifications.
CLOCK, CALENDAR, AND ALARM
The time and calendar information is obtained by reading the appropriate register bytes. The RTC
registers and user RAM are illustrated in Figure 2. The time, calendar, and alarm are set or initialized by
writing the appropriate register bytes. Note that some bits are set to 0. These bits always read 0 regardless
of how they are written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are reserved.
These registers always read 0 regardless of how they are written. The contents of the time, calendar, and
alarm registers are in the BCD format. The day register increments at midnight. Values that correspond to
the day of week are user-defined but must be sequential (e.g., if 1 equals Sunday, 2 equals Monday and so
on). Illogical time and date entries result in undefined operation.
Except where otherwise noted, the initial power on state of all registers is not defined. Therefore, it is
important to enable the oscillator (EOSC = 0) and disable write protect (WP = 0) during initial
configuration.
WRITING TO THE CLOCK REGISTERS
The internal time and date registers continue to increment during write operations. However, the
countdown chain is reset when the seconds register is written. Writing the time and date registers within
one second after writing the seconds register ensures consistent data.
Terminating a write before the last bit is sent aborts the write for that byte.
Local ground plane (Layer 2)
crystal
X1
X2
GND
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