Datasheet

DS1085
7 of 21
The functions of the individual bits are described in the following paragraphs.
DIV1 (Default Setting = 0)
This bit allows the output of the prescaler P1 to be routed directly to the
OUT1 pin (DIV1 = 1). In this condition, the N divider is bypassed so the
programmed value of N is ignored. If DIV1 = 0, the N divider functions
normally.
EN0 (Default Setting = 1)
If EN0 = 1 and PDN0 = 0, the CTRL0 pin functions as an output enable for OUT0, the frequency of the
output being determined by the SEL0 bit.
If PDN0 = 1, the EN0 bit is ignored, CTRL0 functions as a power-down, and OUT0 is always enabled on
power-up, its frequency being determined by the SEL0 bit.
If EN0 = 0, the function of CTRL0 is determined by the SEL0 and PDN0 bits (see Table 2).
SEL0 (Default Setting = 1)
If SEL0 = 1 and EN0 = PDN0 = 0, the CTRL0 pin determines whether the prescaler is bypassed,
controlling the output frequency.
If CTRL0 = 0, the output frequency equals MCLK.
If CTRL0 = 1, the output frequency equals MCLK/M.
If either EN0 or PDN0 = 1, the CTRL0 pin functions as an output enable or power-down and the SEL0
bit determines whether the prescaler is bypassed, thus controlling the output frequency.
If SEL0 = 0, the output is MCLK, the master clock frequency.
If SEL0 = 1, the output is the output frequency of the M prescaler (see Table 2).
PDN0 (Default Setting = 0)
If PDN0 = 1, CTRL0 performs a power-down function, regardless of the setting of the other bits.
If PDN0 = 0, the function of CTRL0 is determined by the values of EN0 and SEL0 (see Table 2).
0M0, 0M1, 1M0, 1M1 (Default Setting = 0)
These bits set the prescaler’s (P0 and P1) divide by number (M) to 1, 2, 4, or 8 (see Table 7a and 7b).