Datasheet

DS1077L
4 of 21
TABLE 1
EN0
(BIT)
SEL0
(BIT)
PDN0
(BIT)
CTRL0
(PIN)
OUT0
(PIN)
CTRL0
FUNCTION
DEVICE
MODE
1
Hi-Z
(OUT1 and OUT2)
Power-Down
0 0 0
0 Hi-Z
Power-Down*
Active
1 Master Clk/M
0 1 0
0 Master Clk
MUX Select Active
1 Hi-Z
1 0 0
0 Master Clk
Output Enable Active
1 Hi-Z
1 1 0
0 Master Clk/M
Output Enable Active**
1
Hi-Z
(OUT1 and OUT2)
Power-Down
X
0
1
0 Master Clk
Power-Down
Active
1 Hi-Z Power-Down
X 1 1
0 Master Clk/M
Power-Down
Active
*This mode is for applications where OUT0 is not used, but CTRL0 is used as a device shutdown.
**Default Condition
CONTROL PIN 1 (CTRL1) – A multifunctional input pin that can be selected as an output enable
and/or a power-down. Its function is determined by the user-programmable control register value of
PDN1. (See Table 2.)
TABLE 2
PDN1
(BIT)
CTRL1
(PIN)
CTRL1
FUNCTION
OUT 1 DEVICE MODE
0 0 Output Enable Out Clk Active*
0 1 Output Enable Hi-Z Active*
1 0 Power-Down Out Clk Active
1 1 Power-Down
Hi-Z
(OUT1 and OUT2)
Power-Down
*Default Condition
NOTE:
Both CTRL0 and CTRL1 can be configured as power-downs, they are internally β€œOR” connected so that
either of the control pins may be used to provide a power-down function for the whole device, subject to
appropriate settings of the PDN0 and PDN1 register bits. (See Table 3.)