Datasheet

DG508A/DG509A
Monolithic CMOS Analog Multiplexers
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DG508A
DG509A
EN
+5V
SWITCH
OUTPUT
V
D
35pF
1kΩ
ALL S
AND DA
DB, D
+2.4V +15V
A0, A1, (A2)
GND
-15V
50Ω
LOGIC
INPUT
V-
Figure 3. Break-Before-Make Test Circuit
t
open
t
transition
t
transition
t
OFF
(EN)
t
ON
(EN)
S
8
ON
3V
LOGIC INPUT
t
r
< 20ns
t
f
< 20ns
SWITCH
OUTPUT
V
D
(SEE FIG. 1)
TRANSITION
TIME
SWITCH
OUTPUT
V
D
(SEE FIG. 2)
TENABLE t
(ON)
t
(OFF)
TIME
SWITCH
OUTPUT
V
D
(SEE FIG. 3)
OPEN TIME
(B.B.M INTERVAL)
50%
0
V
S1
V
S8
0.8V
S1
V
0
V
S
V
S
50%
0V
0.9V
0
0.1V
0
0.8V
S8
0
0
S
1
ON
Figure 4. Timing Diagram for Figures 1, 2, and 3
Table 1a. DG508A Truth Table
A2 A1 A0 EN ON SWITCH
X X X 0 NONE
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
Table 1b. DG509A Truth Table
A1 A0 EN ON SWITCH
X X 0 NONE
0011
0112
1013
1114
X = Don’t care.
X = Don’t care.