Datasheet

Evaluates: SPI and SMBus/I
2
C-Compatible Parts
CMAXQUSB User’s Guide
6
Connector P5: JTAG Debug/Programming
Interface
Connector P5 is used during factory test to program the
firmware into the MAXQ2000. This connector pinout is
identical to the MAXQ2000 EV kit, MAXQ2000-KIT. See
Table 3.
Connector P6: Maxim 1-Wire Interface
Although there are currently no mating EV kits that use
this feature, the MAXQ2000’s 1-Wire interface signal
connects to header P6. See Table 4.
Table 2. Connector P4 Description (continued)
P4 PIN LABEL GPIO DESIGNATOR FUNCTION
20 D1 K2 when K0 = 1 Memory Data
21 D2 K3 when K0 = 1 Memory Data
22 D3 K4 when K0 = 1 Memory Data
23 D4 K5 when K0 = 1 Memory Data
24 D5 K6 when K0 = 1 Memory Data
25 D6 K7 when K0 = 1 Memory Data
26 D7 K8 when K0 = 1 Memory Data MSB
27 K1 K1 General-Purpose I/O
28 K2 K2 General-Purpose I/O
29 K3 K3 General-Purpose I/O
30 K4 K4 General-Purpose I/O
31 K5 K5 General-Purpose I/O
32 K6 K6 General-Purpose I/O
33 K7 K7 General-Purpose I/O
34 K8 K8 General-Purpose I/O
35 MISO K11 SPI Master-In, Slave-Out (MISO) Data
36 MOSI K12 SPI Master-Out, Slave-In (MOSI) Data
37 SCLK K10 SPI Clock
38 CS K9 SPI Chip Select. Configurable active high or active low.
39 OW K15 General-Purpose I/O, Maxim 1-Wire Bus
40 — — No Connection
* This +12V signal is provided only for legacy systems and is normally unpowered.
P5 PIN LABEL FUNCTION
1 TCK TCK to MAXQ2000 Test Access Port (P4.0)
2, 10 GND Ground Return
3 TDO TDO to MAXQ2000 Test Access Port (P4.3)
4 VDDIO MAXQ2000 VDDIO Power Supply
5 TMS TMS to MAXQ2000 Test Access Port (P4.2)
6 RESET Active-High Reset to MAXQ2000
7 KEY No Connection. Pin is physically removed.
8 +5V Optional +5V Connection
9 TDI
TDI from MAXQ2000 Test Access Port
Table 3. Connector P5 Description
P6 PIN LABEL FUNCTION
1 VDD VDD Power Supply
2 OW
Maxim 1-Wire Interface, Through Level
Translator U6
3 GND Ground Return
Table 4. Connector P6 Description