Datasheet

73S8010R Data Sheet DS_8010R_022
16 Rev. 1.6
1-7 8 9 1-8
9
ADDRESS bits R/W bit
ACK bit
DATA bits ACK bit
STOP
condition
START
condition
SCL
SDA
LSBMSB LSBMSB
Figure 6: I
2
C Bus Read Protocol
SCL
SDA
Thdsta
Tsudat Thddat Tsusto
Tbuf
Tlow
Thi
Figure 7: I
2
C Bus Timing Diagram
Table 13: I2C Bus Timing Parameters
Symbol Parameter Min. Typ. Max. Unit
Fsclk Clock frequency – – 400 kHz
Tlow Clock low 1.3 – –
µs
Thi Clock high 0.6 – –
µs
Thdsta Hold time START condition 0.6 – –
µs
Tsudat Data setup time 100 – – ns
Thddat Data hold time 5 – 900 ns
Tsusto Set up time STOP condition 0.6 – –
µs
Tbuf Bus free time between a STOP and
START condition
1.3 – –
µs