Datasheet

DS_8010C_024 73S8010C Data Sheet
Rev. 1.5 19
Symbol Parameter Condition Min. Typ. Max. Unit
Interface Requirements – Data Signals: I/O, AUX1, AUX2, and host interfaces: I/OUC, AUX1UC,
AUX2UC. I
SHORTL
, I
SHORTH
, and V
INACT
requirements do not pertain to I/OUC, AUX1UC, and AUX2UC. I
IL
requirements only pertain to I//OUC, AUX1UC, and AUX2UC.
V
OH
Output level, high (I/O, AUX1,
AUX2)
I
OH
= 0 0.9 V
CC
V
CC
+ 0.1 V
I
OH
= -40 A
0.75 V
CC
V
CC
+ 0.1 V
V
OH
Output level, high (I/OUC,
AUX1UC, AUX2UC)
I
OH
= 0 0.9 V
DD
V
DD
+ 0.1 V
I
OH
= -40 A
0.75 V
DD
V
DD
+ 0.1 V
V
OL
Output level, low I
OL
=1 mA 0.3 V
V
IH
Input level, high (I/O, AUX1,
AUX2)
1.8 V
CC
+ 0.30 V
V
IH
Input level, high (I/OUC,
AUX1UC, AUX2UC)
1.8 V
DD
+ 0.30 V
V
IL
Input level, low -0.3 0.8 V
V
INACT
Output voltage when outside
of session
I
OL
= 0 0.1 V
I
OL
= 1 mA 0.3 V
I
LEAK
Input leakage V
IH
= V
CC
10
A
I
IL
Input current, low
V
IL
= 0, CS = 1 0.65 mA
V
IL
= 0, CS = 0 5 μA
I
SHORTL
Short circuit output current
For output low, shorted
to V
CC
through 33 
15 mA
I
SHORTH
Short circuit output current
For output high, shorted
to ground through 33 
15 mA
t
R
, t
F
Output rise time, fall times
For I/O, AUX1, AUX2,
C
L
= 80 pF, 10% to 90%
For I/OUC, AUX1UC,
AUX2UC,
CL=50 pF, 10% to 90%
100 ns
t
IR
, t
IF
Input rise, fall times 1
s
R
PU
Internal pull-up resistor Output stable for >200 ns 8 11 14
k
FD
MAX
Maximum data rate 1
MHz
T
FDIO
Delay, I/O to I/OUC,
I/OUC to I/O
20 ns
C
IN
Input capacitance 10 pF