Datasheet
DS_8009R_056 73S8009R Data Sheet
Rev. 1.3 13
3 Applications Information
This section provides general usage information for the design and implementation of the 73S8009R.
3.1 Example 73S8009R Schematics
Figure 4 shows a typical application schematic for the implementation of the 73S8009R. Note that minor changes may occur to the reference
material from time to time and the reader is encouraged to contact Teridian for the latest information.
SO28
CLKIN_from_uC
C1
ISO7816=1µF, EMV=3.3µF
PWRDN_from_uC
OFF_interrupt_to_uC
CLK track should be routed
far from RST, I/O, C4 and C8
NOTES:
1) VDD = 2.7V to 3.6V DC.
2) VPC = 4.75V to 6.0V DC (Class A-B-C Reader: 1.8V, 3V and 5V cards)
3) Must be tied to GND if not used
4) Internal pull-up allows it to be left open if unused.
I/OUC_to/from_uC
Card detection
switch is
normally closed
VDD
AUX1UC_to/from_uC
AUX2UC_to/from_uC
See NOTE 3
RSTIN_from_uC
Low ESR (<100mohms) C1
should be placed near the SC
connecter contact
CS_from_uC
CMDVCC5_from_uC
73S80009R
1
2
3
4
5
6
7
12
8
9
10
11
13
14
CS
TEST1
GND
VPC
CLKIN
AUX2
RDY
PRES
PRES
I/O
AUX1
N/C
CLK
RST
VCC
TEST2
CMDVCC5
RSTIN
VDD
GND
OFF
AUX2UC
AUX1UC
PWRDN
I/OUC
R
2
20K
Smart Card Connector
1
2
3
4
5
6
7
8
9
10
VCC
RST
CLK
C4
GND
VPP
I/O
C8
SW-1
SW-2
See NOTE 4
CMDVCC3
N/C
N/C
CMDVCC3_from_uC
RDY_status_to_uC
See NOTE 1
C6
100nF
VDD
VPC
C4
100nF
C5
10uF
See NOTE 2
VDD
15
16
17
18
19
20
21
23
28
27
25
24
26
22
Figure 4: Typical 73S8009R Application Schematic