DS_1215F_003 73S1215F Data Sheet
Rev. 1.4 125
PIN
VDD
STRONG
PFET
STRONG
NFET
Data
From
circuit
TTL
To
circuit
Pullup
Disable
0, 2, 4,
10mA
Current Value
Control
ESD
Figure 36: LED Circuit
PIN
Vih>0.7*VDD
To Circuit
Logic
R= 20kΩ
This buffer has a
special input
threshold:
ESD
Figure 37: Test and Security Pin Circuit
