Owner's manual

73M1866B/73M1966B Implementer’s Guide UG_1x66B_016
8 Rev. 1.3
3.1.3 Call Progress Monitor Reset
If used in 16 kHz mode, the call progress monitor (CPM) circuit must be re-initialized by cycling the
SLEEP bit.
The registers used in this procedure are:
0x0F ENFEH
PWDN SLEEP Res Res Res Res Res
Write X X 1/0 X X X X X
0x0D LOKDET SLHS Res Res RSTLSBI Res Res
Res
Read ? X X X X X X X
0x10 Res Res Res CMVSEL CMTXG1 CMTXG0 CMRXG1 CMRXG0
Write 0 0 0
VAL1 VAL2
VAL3
The temporary variables defined in this procedure are:
VAL1 = System appropriate value to write to the CMVSEL bit.
VAL2 = system appropriate value to write to the CMTXF[1:0] bits.
VAL3 = System appropriate value to write to the CMRXG[1:0] bits.
Begin
1. Write SLEEP = 1.
2. Wait 10 ms.
3. Write SLEEP = 0.
4. Wait 10 ms.
5. Read RG0D.
6. If LOKDET == 0 goto 5.
7. Write CMVSEL = VAL1, CMTXG[1:0] = VAL2 and CMRXG[1:0] = VAL3
to RG10.
End
CPM
Reset
SLEEP = 1
Wait 10 ms
SLEEP = 0
Wait 10 ms
LOKDET==0
?
CMVSEL = VAL1
CMTXG = VAL2
CMRXG = VAL3
Exit
No
Yes