Datasheet

71M6543F/71M6543G Data Sheet
v2 73
Table 60: TMUX2[4:0] Selections
TMUX2[4:0]
Signal Name Description
0
WD_OVF
Indicates when the watchdog timer has expired (overflowed).
1 PULSE_1S
One second pulse with 25% Duty Cycle. This signal can be used
to measure the deviation of the RTC from an ideal 1 second
interval. Multiple cycles should be averaged together to filter out
jitter.
2 PULSE_4S
Four second pulse with 25% Duty Cycle. This signal can be used
to measure the deviation of the RTC from an ideal 4 second
interval. Multiple cycles should be averaged together to filter out
jitter. The 4 second pulse provides a more precise measurement
than the 1 second pulse.
3
RTCLK
32.768 kHz clock waveform
8
SPARE[1] bit – I/O RAM
0x2704[1]
Copies the value of the bit stored in 0x2704[1]. For general
purpose use.
9
SPARE[2] bit – I/O RAM
0x2704[2]
Copies the value of the bit stored in 0x2704[2]. For general
purpose use.
A
WAKE
Indicates when a WAKE event has occurred.
B MUX_SYNC
Internal multiplexer frame SYNC signal. See Figure 4 and
Figure
5
.
C
MCK
See 2.5.3 on page 49.
E
GNDD
Digital GND. Use this signal to make the TMUX2OUT pin static.
12
INT0 – DIG I/O
Interrupt 0. See 2.4.8 on page 39. Also see Figure 12 on page 45.
13 INT1 – DIG I/O
14
INT2 – CE_PULSE
15
INT3 – CE_BUSY
16 INT4 - VSTAT
17
INT5 – EEPROM/SPI
18
INT6 – XFER, RTC
1F
RTM_CK (flash)
See 2.3.5 on page 26.
Note:
All TMUX2[4:0] values which are not shown are reserved.