Datasheet

71M6543F/71M6543G Data Sheet
128 v2
5.3.11 CE Flow Diagrams
Figure 38 through Figure 40 show the data flow through the CE in simplified form. Functions not shown
include delay compensation, sample interpolation, scaling and the processing of meter equations.
Figure 38: CE Data Flow: Multiplexer and ADC
Figure 39: CE Data Flow: Scaling, Gain Control, Intermediate Variables for one Phase
VREF
multiplexer
F
S
=
2184 Hz
∆
∑
mod
Deci
-
mator
de
-
multiplexer
F
S
=
2184 Hz
IA_RAW
IA
VB
VA
IB
IC
VC
IB_RAW
VA_RAW
VB_RAW
IC_RAW
VC_RAW
I
D
I
D
_RAW